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    Product>>8051 MicroController>>STC15F101W series

Features:

 

Enhanced 8051 Central Processing Unit, 1T, single clock per machine cycle, faster 8~12 times

than the rate of a traditional 8051.
Operating voltage range:
STC15F101W series: 5.5V ~ 3.8V (5V MCU). STC15L101W series: 3.6V ~ 2.4V (3V MCU).
On-chip 2K/4K/5K/7K FLASH program memory with flexible ISP/IAP capability, can be repeatedly
erased more than 100 thousand times.
on-chip 128 bytes SRAM
On-chip EEPROM with large capacity can be repeatedly erased more than 100 thousand times.
ISP/IAP, In-System-Programming and In-Application-Programming , no need for programmer and
emulator.
Internal hghly reliable Reset with 8 levels optional threshold voltage of reset, external reset curcuit
can be completely removed
Internal high- precise R/C clock(±0.3%) with ±1% temperature drift (-40℃~+85℃) while ±0.6%
(-20℃ ~+65℃) in normal temperature and wide frenquency adjustable between 5MHz and 35MHz
(5.5296MHz / 11.0592MHz / 22.1184MHz / 33.1776MHz).
No need external crystal and reset, and can output clock and low reset signal from MCU.
Operating frequency range: 0- 35MHz, is equivalent to traditional 8051:0~420MHz.
UART can be achieved by combining [P3.0/INT4, P3.1] with Timer
Support the function of Encryption Download (to protect your code from being intercepted).
Support the function of RS485 Control
Code protection for flash memory access, excellent noise immunity, very low power consumption
Power management mode: Slow-Down mode, Idle mode(all interrupt can wake up Idle mode),
Stop/Power- Down mode.
Timers which can wake up stop/power-down mode: have internal low-power special wake-up Timer.
Resource which can wake up stop/power-down mode are: INT0/P3.2, INT1/P3.3 (INT0/INT1, may
be generated on both rising and falling edges), INT2/P3.4, INT3/P3.5, INT4/P3.0 ( INT2
/ INT3/ INT4, only be generated on falling
edge); pins T0/T2(their falling edge can wake up if T0/T2 have been enabled before power-down mode,
but no interrupts can be generatetd); internal low-power special wake- up Timer.
Two Timers/Counters----T0(are compatible with Timer0 of traditional 8051) and T2, T0/T2 all can
independently achieve external programmable clock output
Programmable clock output function(output by dividing the frequency of the internal system clock
or the input clock of external pin):
The speed of external programmable clock output of 5V MCU is also not more than 13.5MHz,
because the output speed of I/O port of STC15 series 5V MCU is not more than 13.5MHz.
The speed of external programmable clock output of 3.3V MCU is also not more than 8MHz,
because the output speed of I/O port of STC15 series 3.3V MCU is not more than 8MHz.
① The Programmable clock output of T0 is on P3.5/T0CLKO (output by dividing the frequency of the
internal system clock or the input clock of external pin T0/P3.4)
② The Programmable clock output of T2 is on P3.0/T2CLKO (output by dividing the frequency of the
internal system clock or the input clock of external pin T2/P3.1)
Two timers/counters in above all can be output by dividing the frequency from 1 to 65536.
③ The Programmable clock output of master clock is on P3.4/MCLKO, and its frequency can
be divided into MCLK/1, MCLK/2, MCLK/4.
The master clock can either be internal R/C clock or the external input clock or the
external crystal oscillator.
MCLK is the frequency of master clock. MCLKO is the output of master clock.
It is on MCLKO/P3.4 that the Programmable clock output of master clock of STC15 series 8-pin MCU
(such as STC15F101W series). However, it is on MCLKO/P5.4 that the Programmable clock output
of master clock of other STC15 series MCU including 16-pin or more than 16-pin MCU(such as
STC15F2K60S2, STC15W4K32S4 and so on)
One 15 bits Watch-Dog-Timer with 8-bit pre-scaler (one-time-enabled)
advanced instruction set, which is fully compatible with traditional 8051 MCU, have hardware
multiplication / division command.
6 common I/O ports are available, their mode is quasi_bidirectional/weak pull-up (traditional 8051
I/O ports mode) after reset, and can be set to four modes: quasi_bidirectional/weak pull-up, strong
push-pull/ strong pull-up, input-only/high-impedance and open drain.
the driving ability of each I/O port can be up to 20mA, but the current of the whole chip don’texceed
this maximum 90mA.
If I/O ports are not enough, it can be extended by connecting a 74HC595. Besides, cascading
several chips also can extend to dozens of I/O ports.
Package: SOP-8, DIP-8, DFN-8.
All products are baked 8 hours in high-temperature 175℃ after be packaged, Manufacture
guarantee good quality.
In Keil C development environment, select the Intel 8052 to compiling and only contain < reg51.h >
as header

 

 

Product Documents:

General Overview: STC15F101W_Features.pdf

Data Sheet: STC15F2K60S2.pdf

ROSH:

 

Product Support:

专用烧录软件:

 ISP programming software :STC ISP programming software (v6.28)

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STC15F101W series Selection Table

ParNo

Voltage
(V)

Flash
(Byte)

SRAM
(Byte)

T
I
M
E
R
T0 T2

支持
RS485
下载

可对外
输出时
钟和复

内部
高精
准时

I/O

W
D
T

D
P
T
R

EEP
ROM
(Byte)

内部低
压中断
并可掉
电唤醒

内部
可选
复 位
门槛
电压

支持
掉电
唤醒
外部
中断

掉电
唤醒
专用
定时

Package
8-Pin
6个I/O

Package
8-Pin
6个I/O

STC15F100W

5.5 - 3.8

512

128

2

Y

Y

Y

6

8级

5个

DIP

SOP

STC15F101W

5.5 - 3.8

1K

128

2

Y

Y

6

4K

8级

5个

DIP

SOP

STC15F102W

5.5 - 3.8

3K

128

2

Y

Y

6

3K

8级

5个

DIP

SOP

STC15F103W

5.5 - 3.8

4K

128

2

Y

Y

6

2K

8级

5个

DIP

SOP

STC15F104W

5.5 - 3.8

4K

128

2

Y

Y

6

1K

8级

5个

DIP

SOP

STC15F105W

5.5 - 3.8

5K

128

2

Y

Y

6

IAP

8级

5个

DIP

SOP

IRC15F107W

5.5 - 3.8

6K

128

2

Y

Y

6

IAP

8级

5个

DIP

SOP

 

STC15L100W

3.6 - 2.4

1K

128

2

Y

Y

6

8级

5个

DIP

SOP

STC15L101W

3.6 - 2.4

2K

128

2

Y

Y

6

4K

8级

5个

DIP

SOP

STC15L102W

3.6 - 2.4

3K

128

2

Y

Y

6

3K

8级

5个

DIP

SOP

STC15L103W

3.6 - 2.4

3K

128

2

Y

Y

6

2K

8级

5个

DIP

SOP

STC15L104W

3.6 - 2.4

4K

128

2

Y

Y

6

1K

8级

5个

DIP

SOP

STC15L105W

3.6 - 2.4

5K

128

2

Y

Y

6

IAP

8级

5个

DIP

SOP

IRC15L107W

3.6 - 2.4

6K

128

2

Y

Y

6

IAP

8级

5个

DIP

SOP

 

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